Simulation & Analysis of 3ϕ (5&7 level) Diode Clamped Multilevel inverter fed to Induction Motor (International Journal of Scientific Research and Management (IJSRM), 2015)
Use of multilevel inverters has become popular in recent years for high power applications and an effective and practical solution for increasing power and reducing harmonics of AC waveforms. By synthesizing the AC output voltage from several levels of DC voltages, stair case output waveform can be produced. This allows for high output voltage and simultaneously lowers the stress on the semiconductor device, complexity of control and introduce voltage unbalancing problems. In this paper the proposed topology requires less number of switches, free from voltage unbalancing problems and reduced complexity when compared to other topology of available multilevel inverters Neutral Point Clamped and Flying Capacitor. This topology shown the requirement of components and compared to other topologies to show the superiority. The simulation results of proposed topology three phase five-level and seven-level multilevel inverter fed induction motor drive are verified using MATLAB. The THD between five-level and seven-level inverter is compared it can be observed that in the higher levels THD is reduced